Amara Amara & Olivier Rozeau 
Planar Double-Gate Transistor [PDF ebook] 
From technology to circuit

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Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called “scaling”, has highlighted serious advantages as integration density, speed, power consumption, functionality and cost. Direct consequence was the decrease of cost-per-function, so the electronic productivity has largely progressed in this period. Another usually cited trend is the evolution of the in- gration density as expressed by the well-know Moore’s Law in 1975: the number of devices per chip doubles every 2 years. This evolution has allowed improving signi?cantly the circuit complexity, offering a great computing power in the case of microprocessor, for example. However, since few years, signi?cant issues appeared such as the increase of the circuit heating, device complexity, variability and dif?culties to improve the integration density. These new trends generate an important growth in development and production costs. Though is it, since 40 years, the evolution of the microelectronics always f- lowed the Moore’s law and each dif?culty has found a solution.

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Table of Content

Multiple Gate Technologies.- Compact Modeling of Independent Double-Gate MOSFET: A Physical Approach.- Compact Modeling of Double Gate MOSFET for IC Design.- Low Frequency Noise in Double-Gate SOI CMOS Devices.- Analog Circuit Design.- Logic Circuit Design with DGMOS Devices.- SRAM Circuit Design.

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Language English ● Format PDF ● Pages 211 ● ISBN 9781402093418 ● File size 7.5 MB ● Editor Amara Amara & Olivier Rozeau ● Publisher Springer Netherland ● City Dordrecht ● Country NL ● Published 2009 ● Downloadable 24 months ● Currency EUR ● ID 2149066 ● Copy protection Social DRM

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