Robust Nano-Computing focuses on various issues of robust nano-computing, defect-tolerance design for nano-technology at different design abstraction levels. It addresses both redundancy- and configuration-based methods as well as fault detecting techniques through the development of accurate computation models and tools. The contents present an insightful view of the ongoing researches on nano-electronic devices, circuits, architectures, and design methods, as well as provide promising directions for future research.
Table of Content
Fault Tolerant Nanocomputing.- Transistor-Level Based Defect-Tolerance for Reliable Nanoelectronics.- Fault-Tolerant Design for Nanowire-Based Programmable Logic Arrays.- Built-In Self-Test and Defect Tolerance for Molecular Electronics-Based Nano Fabrics.- The Prospect and Challenges of CNFET Based Circuits: A Physical Insight.- Computing with Nanowires: A Self Assembled Neuromorphic Architecture.- Computational Opportunities and CAD for Nanotechnologies.
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