Jan Haase 
Models, Methods, and Tools for Complex Chip Design [PDF ebook] 
Selected Contributions from FDL 2012

Formal Plausibility Checks for Environment.- Efficient Refinement Strategy Exploiting Component Properties in A CEGAR Process.- Formal Specification Level.- Power Estimation Methodology for System C.- System C Analysis for Nondeterminism Anomalies.- A Design and Verification Methodology for Mixed-Signal Systems Using System C-AMS.- Configurable Load Emulation Using FPGA and Power Amplifiers for Automotive Power ICs.- Model Based Design of Distributed Embedded Cyber Physical Systems.- Model-driven Methodology for the Development of Multi-level Executable Environments.- The Concept and Study of Grid Responsiveness.- Polynomial Metamodel-Based Fast Optimization of Nanoscale PLL Components.- Methodology and Example-Driven Interconnect Synthesis for Designing Heterogenous Coarse-Grain Reconfigurable Architectures.