Pascal Meinerzhagen & Adam Teman 
Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip [PDF ebook] 

Motivation.- Introduction to Gain-Cell Based e DRAMs (GC-e DRAMs).- GC-e DRAMs Operated at Scaled Supply Voltages.- Near-VT GC-e DRAM Implementations with Extended Retention Times.- Aggressive Technology and Voltage Scaling (to Sub-VT Domain).- Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications.- 4T Gain-Cell with Internal-Feedback for Ultra-Low Retention Power at Scaled CMOS Nodes.- Multilevel GC-e DRAM (MLGC-e DRAM).- Soft Error Tolerant Low Power 4T Gain-Cell Array with Multi-Bit Error Detection and Correction.- Conclusions.

Dr. Pascal Meinerzhagen is a Senior Research Scientist at Intel Labs, Intel Corporation, performing research into energy-efficient, error-resilient circuits and systems in high-performance Fin FET CMOS technology.
Dr. Adam Teman is a tenure track Senior Lecturer and co-director of the Emerging Nano Scaled Integrated Circuits and Systems (En ICS) Labs in the Faculty of Engineering at Bar-Ilan Univeristy. His research interests include energy-efficient digital circuit design with an emphasis on embedded memories and efficient physical implementation of VLSI systems.

Robert Giterman is a researcher Ph.D. student at the Emerging Nanoscaled Intergrated Circuits and Systems (En ICS) Labs in Bar Ilan University, guided by Prof. Alexander Fish and Dr. Adam Teman. He received the B.Sc. degree in electrical engineering from Ben-Gurion University, Be’er Sheva, Israel, in 2013. He completed the M.Sc. degree at Ben-Gurion University in 2014 as part of a fast track program for outstanding students. Mr. Giterman’s research interests include embedded DRAM design and optimization for low power and high performance operation, SRAM design with an emphasis on improved stability, error-correction and fault-tolerant circuits and development of hardware-security oriented embedded memories for use in low-power applications and high-end processors. As part of his research, he led several full test chip integrations and tape out. He has authored/co-authored 15 journal articles and international conference papers and 3 patent applications, and has presented his research at a number of international conferences. In 2014, he was awarded the presidential scholarship for outstanding Doctorate students.

Noa Edri is a design and verification So C engineer at Nanoscaled Intergrated Circuits and Systems (En ICS) Labs in Bar Ilan University. She received her B.Sc. in Electrical and Computer Engineering from Ben Gurion University, Israel, in 2012. She completed her M.Sc. at Bar-Ilan University in 2015 under the guidance of Prof. Alex Fish. Her M.Sc. thesis focused on embedded DRAM optimization for low power and developing system methodology for low data retention voltage in SRAM.
Prof. Andreas Burg is Professor and Director of the Telecommunications Circuits Laboratory at EPFL. His research interests range from transistor-level CMOS design (mostly for embedded memories) to energy-efficient embedded systems to the design of algorithms and architectures for VLSI Signal Processing and circuits and systems for wireless communications.
Prof. Alexander Fish is a Professor, head of the Nano Electronics Track and founder of the Emerging Nano Scaled Integrated Circuits and Systems (En ICS) Labs in the Faculty of Engineering at Bar-Ilan Univeristy. His research interests include development of energy efficient “smart” CMOS image sensors, ultra low power SRAM, DRAM and Flash memory arrays and energy efficient design techniques for low voltage digital and analog VLSI chips.