Smart and Flexible Digital-to-Analog Converters proposes new concepts and implementations for flexibility and self-correction of current-steering digital-to-analog converters (DACs) which allow the attainment of a wide range of functional and performance specifications, with a much reduced dependence on the fabrication process.
DAC linearity is analysed with respect to the accuracy of the DAC unit elements. A classification is proposed of the many different current-steering DAC correction methods. The classification reveals methods that do not yet exist in the open literature. Further, this book systematically analyses self-calibration correction methods for the various DAC mismatch errors. For instance, efficient calibration of DAC binary currents is identified as an important missing method.
This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance.
Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties.<
DAC linearity is analysed with respect to the accuracy of the DAC unit elements. A classification is proposed of the many different current-steering DAC correction methods. The classification reveals methods that do not yet exist in the open literature. Further, this book systematically analyses self-calibration correction methods for the various DAC mismatch errors. For instance, efficient calibration of DAC binary currents is identified as an important missing method.
This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance.
Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties.
This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance.
Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties.
Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties.
Table des matières
List Of Abbreviations.- PART I: INTRODUCTION AND BASICS.- PART II: STATE-OF-THE-ART CORRECTION METHODS. PART III: NEW MODELING, ANALYSIS, AND CLASSIFICATION.- PART IV: NEW CONCEPTS AND METHODS.- PART V: DESIGN EXAMPLES. PART VI: CONCLUSIONS. Summary.- Conclusions.- Appendix A. Published CMOS Digital-To-Analog Converters From 1986 Until 2009.- References.
A propos de l’auteur
Georgi Radulov was born in Plovdiv, Bulgaria in 1978. He received the M.Sc. engineer (èíæ.) degree in electrical engineering in 2001 from the Technical University of Sofia (TU-Sofia), Bulgaria. In 2004, he received the degree Professional Doctorate in Engineering (PDEng) from Stan Ackermans Institute at Eindhoven University of Technology (TU/e). He received his Ph.D. degree from TU/e in 2010. From 1999 until 2001, he was a student assistant at ECAD Lab of TU-Sofia. Since August 2001, he is member of the Mixed-Signal Microelectronics (Ms M) Group at TU/e. Since 2009, he is a part-time Assistant Professor at the Electrical Engineering faculty of TU/e and a part-time director of the micro-electronics consultancy company Welikan B.V. Georgi Radulov holds 2 US patents on current calibration. In 2008, he was awarded the Outstanding Student Paper of the IEEE conference APCCAS 2008, in Macau. Georgi Radulov has more than 20 publications on Digital-to-Analog Converters.
Patrick John Quinn graduated in Electronic Engineering at University College Dublin with a B.E. degree in 1986 and M.Sc. (Eng.) degree in 1989. The M.Sc. thesis was entitled “Design and investigation of a direct conversion FM receiver and its application in mobile radio”. The research for the thesis was carried out in the Mobile Telephony group at Philips Semiconductors in Eindhoven. He received his Ph.D. degree in TU/e in 2006. His Ph.D. thesis was entitled “High-accuracy switched-capacitor techniques applied to filter and ADC design”. From 1989 to 2000, he was employed at the Philips Semiconductors Advanced Systems Lab in Eindhoven. There he worked in various roles from IC design engineer to project leader in the areas of mobile telephony, video and radio systems and circuits. Most projects were based on analogue sampled-data processing, usually using switched capacitor circuit techniques for implementation. At the end of 2000, he joined the mixed-signalcentre-of-expertise of Xilinx at European HQ in Dublin, Ireland. There he is team leader and technical lead of advanced mixed-signal IC design projects for Virtex FPGAs down to 32nm CMOS. These are the first mixed-signal systems to enter into full 32nm production of any company in the world. He author has a range of professional publications and international patents. He has had a long association with the research activities of the Mixed-Signal Microelectronics department of the Eindhoven University of Technology.
Johannes A. (Hans) Hegt (M’97, SM’2001) was born on June 30, 1952 in Amsterdam, the Netherlands. He studied Electrical Engineering at the Eindhoven University of Technology (TU/e), where he graduated with honors in 1982. From 1983 until 1986 he was an assistant at the TU/e. Since 1987, he is a lecturer at this University, where he gives courses in the areas of switched-capacitor filter engineering, switched current filters, digital electronics, microprocessors, digital signal processing, neural networks, non-linear systems and mixed-signal systems. In 1988 he received a Ph.D. degree on synthesis of switched-capacitor filters. Since 1994 he is an Associate Professor on mixed analogue/digital circuit design. He is currently especially involved in the hardware realization of ADCs and DACs.
Arthur H.M. van Roermund (SM’95) was born in Delft, The Netherlands in 1951. He received the M.Sc. degree in electrical engineering in 1975 from the Delft University of Technology and the Ph.D. degree in Applied Sciences from the K.U.Leuven, Belgium, in 1987. From 1975 to 1992 he was with Philips Research Laboratories in Eindhoven. From 1992 to 1999 he has been a full professor at the Electrical Engineering Department of Delft University of Technology, where he was chairman of the Electronics Research Group and member of the management team of DIMES. From 1992 to 1999 he has been chairman of a two-years post-graduate school for“chartered designer”. From 1992 to 1997 he has been consultant for Philips. October 1999 he joined Eindhoven University of Technology as a full professor, chairing the Mixed-signal Microelectronics Group. Since September 2002 he is also director of research of the Department of Electrical Engineering. He is chairman of the board of Pro RISC, a nation-wide microelectronics platform; a member of the ICT research platform for the Netherlands (IPN); and a member of the supervisory board of the NRC Photonics research centre. Since 2001, he is one of the three organisers of the yearly workshop on Advanced Analog Circuit Design (AACD). In 2004 he achieved the ‘Simon Stevin Meester’ award, coupled to a price of 500.000ˆ, for his scientific and technological achievements. In 2007 he was member of an international assessment panel for the Department of Electronics and Information of Politecnico di Milano, and in 2009 for Electronics and Electrical Engineering for the merged Aalto University Finland. He authored/co-authored more than 300 articles and 25 books.
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