Patrick Girard & Nicola Nicolici 
Power-Aware Testing and Test Strategies for Low Power Devices [PDF ebook] 

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Managing the power consumption of circuits and systems is now considered one of the most important challenges for the semiconductor industry. Elaborate power management strategies, such as dynamic voltage scaling, clock gating or power gating techniques, are used today to control the power dissipation during functional operation. The usage of these strategies has various implications on manufacturing test, and power-aware test is therefore increasingly becoming a major consideration during design-for-test and test preparation for low power devices. This book explores existing solutions for power-aware test and design-for-test of conventional circuits and systems, and surveys test strategies and EDA solutions for testing low power devices.

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Table des matières

Fundamentals of VLSI Testing.- Power Issues During Test.- Low-Power Test Pattern Generation.- Power-Aware Design-for-Test.- Power-Aware Test Data Compression and BIST.- Power-Aware System-Level Test Planning.- Low-Power Design Techniques and Test Implications.- Test Strategies for Multivoltage Designs.- Test Strategies for Gated Clock Designs.- Test of Power Management Structures.- EDA Solution for Power-Aware Design-for-Test.
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Langue Anglais ● Format PDF ● Pages 363 ● ISBN 9781441909282 ● Taille du fichier 12.1 MB ● Éditeur Patrick Girard & Nicola Nicolici ● Maison d’édition Springer US ● Lieu NY ● Pays US ● Publié 2010 ● Téléchargeable 24 mois ● Devise EUR ● ID 2149843 ● Protection contre la copie DRM sociale

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