This book presents the research challenges that are due to the introduction of the 3rd dimension in chips for researchers and covers the whole architectural design approach for 3D-So Cs. Nowadays the 3D-Integration technologies, 3D-Design techniques, and 3D-Architectures are emerging as interesting, truly hot, broad topics. The present book gathers the recent advances in the whole domain by renowned experts in the field to build a comprehensive and consistent book around the hot topics of three-dimensional architectures and micro-architectures. This book includes contributions from high level international teams working in this field.
विषयसूची
Three-Dimensional Integration of Integrated Circuits – an Introduction.- The Promises and Limitation of 3-D Integration.- Testing 3D Stacked ICs Containing Through-Silicon Vias.- Design and Computer Aided Design of 3DIC.- Physical Analysis of No C Topologies for 3-D Integrated Systems.- Three-Dimensional Networks-on-Chip: Performance Evaluation.- Asynchronous 3D-No Cs.- Design of Application-Specific 3D Networks-on-Chip Architectures.- 3D Network on Chip Topology Synthesis: Designing Custom Topologies for Chip Stacks.- 3-D No C on Inductive Wireless Interconnect.- Influence of Stacked 3D Memory/Cache architectures on GPUs.
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