This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect. It highlights design challenges and discusses fundamentals of No C technology, including architectures, algorithms and tools. Coverage focuses on topology exploration for both 2D and 3D No Cs, routing algorithms, No C router design, No C-based system integration, verification and testing, and No C reliability. Case studies are used to illuminate new design methodologies.
विषयसूची
Part I: Network-on-Chip Design Methodology.- Network-on-Chip Technology: A Paradigm Shift.- No C Modeling and Topology Exploration.- Communication Architecture.- Power and Thermal Effects and Management.- No C-based System Integration.- No C Verification and Testing.- The Spidergon STNo C.- Middleware Memory Management in No C.- On Designing 3-D Platforms.- The SYSMANTIC No C Design and Prototyping Framework.- Part II: Suggested Projects.- Projects on Network-on Chip.
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