Penulis: Gary D. Hachtel

Abstraction Refinement for Large Scale Model Checking summarizes recent research on abstraction techniques for model checking large digital system. Considering both the size of today’s digital system …

Logic Synthesis and Verification Algorithms is a textbook designed for courses on VLSI Logic Synthesis and Verification, Design Automation, CAD and advanced level discrete mathematics. It also serves …

Logic Synthesis and Verification Algorithms blends mathematical foundations and algorithmic developments with circuit design issues. Each new technique is presented in the context of its application …

The roots of the project which culminates with the writing of this book can be traced to the work on logic synthesis started in 1979 at the IBM Watson Research Center and at University of California, …