This book presents techniques for energy reduction in adaptive embedded multimedia systems, based on dynamically reconfigurable processors. The approach described will enable designers to meet performance/area constraints, while minimizing video quality degradation, under various, run-time scenarios. Emphasis is placed on implementing power/energy reduction at various abstraction levels. To enable this, novel techniques for adaptive energy management at both processor architecture and application architecture levels are presented, such that both hardware and software adapt together, minimizing overall energy consumption under unpredictable, design-/compile-time scenarios.
Table of Content
Introduction.- Background and Related Work.- Adaptive Low-Power Architectures for Embedded Multimedia Systems.- Adaptive Low-Power Video Coding.- Adaptive Low-Power Reconfigurable Processor Architecture.- Power Measurement of the Reconfigurable Processors.- Benchmarks and Results.- Conclusion and Outlook.- Appendix A: A Multi-Level Rate Control.- Appendix B: Simulation Environment the H.264 Video Encoder Demonstration.- Appendix C: The CES Video Analyzer Tool.
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