Dynamic System Reconfiguration in Heterogeneous Platforms defines the MORPHEUS platform that can join the performance density advantage of reconfigurable technologies and the easy control capabilities of general purpose processors. It consists of a System-on-Chip made of a scalable system infrastructure hosting heterogeneous reconfigurable accelerators, providing dynamic reconfiguration capabilities and data-stream management capabilities.
Table of Content
to MORPHEUS.- State of the Art.- The MORPHEUS Architecture.- MORPHEUS Architecture Overview.- Flexeos Embedded FPGA Solution.- The Dream Digital Signal Processor.- XPP-III.- The Hardware Services.- The MORPHEUS Data Communication and Storage Infrastructure.- The Integrated Tool Chain.- Overall MORPHEUS Toolset Flow.- The Molen Organisation and Programming Paradigm.- Control of Dynamic Reconfiguration.- Specification Tools for Spatial Design.- Spatial Design.- The Applications.- Real-Time Digital Film Processing.- Ethernet Based In-Service Reconfiguration of So Cs in Telecommunication Networks.- Homeland Security – Image Processing for Intelligent Cameras.- PHY-Layer of 802.16 Mobile Wireless on a Hardware Accelerated So C.- Concluding Section.- Conclusions.- Training.- Dissemination of MORPHEUS Results.- Exploitation from the MORPHEUS Project.- Project Management.
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