Nikolaos Voros & Amar Mukherjee 
VLSI 2010 Annual Symposium [PDF ebook] 
Selected papers

Support

VLSI 2010 Annual Symposium will present extended versions of the best papers presented in ISVLSI 2010 conference. The areas covered by the papers will include among others: Emerging Trends in VLSI, Nanoelectronics, Molecular, Biological and Quantum Computing. MEMS, VLSI Circuits and Systems, Field-programmable and Reconfigurable Systems, System Level Design, System-on-a-Chip Design, Application-Specific Low Power, VLSI System Design, System Issues in Complexity, Low Power, Heat Dissipation, Power Awareness in VLSI Design, Test and Verification, Mixed-Signal Design and Analysis, Electrical/Packaging Co-Design, Physical Design, Intellectual property creating and sharing.

€213.99
payment methods

Table of Content

1. Intelligent NOC Hotspot Prediction.- 2. Accurate Asynchronous Network-on-Chip Simulation Based on a Delay-Aware Model.- 3. Trust Management Through Hardware Means: Design Concerns and Optimizations.- 4. MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures.- 5. 2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-Core Architectures.- 6. Adaptive Task Migration Policies for Thermal Control in MPSo Cs.- 7. A High Level Synthesis Exploration Framework with Iterative Design Space Partitioning.- 8. A Scalable Bandwidth Aware Architecture for Connected Component Labelling.- 9. The SATURN Approach to Sys ML-based HW/SW Codesign.- 10. Mapping Embedded Applications on MPSo C – The MNEMEE approach.- 11. The MOSART Mapping Optimisation for Scalable Multi-core ARchi Tecture.- 12. XMSIM: EXtensible Memory SIMulator for Early Memory Hierarchy Evaluation.- 13. Self-Freeze Linear Decompressors: Test Pattern Generators for Low Power Scan Testing.- 14. SUT-RNS Forward and Reverse Converters.- 15. Off-Chip SDRAM Access Through Spidergon STNo C.- 16. Digital Microfluidic Biochips: A Vision for Functional Diversity and More than Moore.- 17. FPGA Startup through Sequential Partial and Dynamic Reconfiguration.- 18. Two Dimensional Dynamic Multigrained Reconfigurable Hardware.- 19. System Level Design for Embedded Reconfigurable Systems using MORPHEUS Platform.- 20. New Dimensions in Design Space and Runtime Adaptivity for Multiprocessor Systems through Dynamic and Partial Reconfiguration: The RAMPSo C Approach.

Buy this ebook and get 1 more FREE!
Language English ● Format PDF ● Pages 346 ● ISBN 9789400714885 ● File size 11.5 MB ● Editor Nikolaos Voros & Amar Mukherjee ● Publisher Springer Netherland ● City Dordrecht ● Country NL ● Published 2011 ● Downloadable 24 months ● Currency EUR ● ID 2247371 ● Copy protection Social DRM

More ebooks from the same author(s) / Editor

18,519 Ebooks in this category