The integrated circuit has evolved tremendously in recent years as Moore’s Law has enabled exponentially more devices and functionality to be packed onto a single piece of silicon. In some ways however, these highly integrated circuits, of which microprocessors are the flagship example, have become victims of their own success. Despite dramatic reductions in the switching energy of the transistors, these reductions have kept pace neither with the increased integration levels nor with the higher switching frequencies. In addition, the atomic dimensions being utilized by these highly integrated processors have given rise to much higher levels of random and systematic variation which undercut the gains from process scaling that would otherwise be realized. So these factors—the increasing impact of variation and the struggle to control power consumption—have given rise to a tremendous amount of innovation in the area of adaptive techniques for dynamic processor optimization. The fundamental premise behind adaptive processor design is the recognition that variations in manufacturing and environment cause a statically configured operating point to be far too inefficient. Inefficient designs waste power and performance and will quickly be surpassed by more adaptive designs, just as it happens in the biological realm. Organisms must adapt to survive, and a similar trend is seen with processors – those that are enabled to adapt to their environment, will be far more competitive.
Cuprins
Technology Challenges Motivating Adaptive Techniques.- Technological Boundaries of Voltage and Frequency Scaling for Power Performance Tuning.- Adaptive Circuit Technique for Managing Power Consumption.- Dynamic Adaptation Using Body Bias, Supply Voltage, and Frequency.- Adaptive Supply Voltage Delivery for Ultra-dynamic Voltage Scaled Systems.- Dynamic Voltage Scaling with the XScale Embedded Microprocessor.- Sensors for Critical Path Monitoring.- Architectural Techniques for Adaptive Computing.- Variability-Aware Frequency Scaling in Multi-Clock Processors.- Temporal Adaptation – Asynchronicity in Processor Design.- Dynamic and Adaptive Techniques in SRAM Design.- The Challenges of Testing Adaptive Designs.