New Algorithms, Architectures and Applications for Reconfigurable Computing consists of a collection of contributions from the authors of some of the best papers from the Field Programmable Logic conference (FPL’03) and the Design and Test Europe conference (DATE’03). In all, seventy-nine authors, from research teams from all over the world, were invited to present their latest research in the extended format permitted by this special volume. The result is a valuable book that is a unique record of the state of the art in research into field programmable logic and reconfigurable computing.
The contributions are organized into twenty-four chapters and are grouped into three main categories: architectures, tools and applications. Within these three broad areas the most strongly represented themes are coarse-grained architectures; dynamically reconfigurable and multi-context architectures; tools for coarse-grained and reconfigurable architectures; networking, securityand encryption applications.
Field programmable logic and reconfigurable computing are exciting research disciplines that span the traditional boundaries of electronic engineering and computer science. When the skills of both research communities are combined to address the challenges of a single research discipline they serve as a catalyst for innovative research. The work reported in the chapters of this book captures that spirit of that innovation.
Cuprins
Architectures.- Extra-dimensional Island-Style FPGAs.- A Tightly Coupled VLIW/Reconfigurable Matrix and its Modulo Scheduling Technique.- Stream-based XPP Architectures in Adaptive System-on-Chip Integration.- Core-Based Architecture for Data Transfer Control in So C Design.- Customizable and Reduced Hardware Motion Estimation Processors.- Methodologies and Tools.- Enabling Run-time Task Relocation on Reconfigurable Systems.- A Unified Codesign Environment.- Mapping Applications to a Coarse Grain Reconfigurable System.- Compilation and Temporal Partitioning for a Coarse-grain Reconfigurable Architecture.- Run-time Defragmentation for Dynamically Reconfigurable Hardware.- Virtual Hardware Byte Code as a Design Platform for Reconfigurable Embedded Systems.- A Low Energy Data Management for Multi-Context Reconfigurable Architectures.- Dynamic and Partial Reconfiguration in FPGA So Cs: Requirements Tools and a Case Study.- Applications.- Design Flow for a Reconfigurable Processor.- IPsec-Protected Transport of HDTV over IP.- Fast, Large-scale String Match for a 10 Gbps FPGA-based NIDS.- Architecture and FPGA Implementation of a Digit-serial RSA Processor.- Division in GF(p) for Application in Elliptic Curve Cryptosystems on Field Programmable Logic.- A New Arithmetic Unit in GF(2M) for Reconfigurable Hardware Implementation.- Performance Analysis of SHACAL-1 Encryption Hardware Architectures.- Security Aspects of FPGAs in Cryptographic Applications.- Bioinspired Stimulus Encoder for Cortical Visual Neuroprostheses.- A Smith-Waterman Systolic Cell.- The Effects of Polynomial Degrees.
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