Model checking is a computer-assisted method for the analysis of dynamical systems that can be modeled by state-transition systems. Drawing from research traditions in mathematical logic, programming languages, hardware design, and theoretical computer science, model checking is now widely used for the verification of hardware and software in industry.
The editors and authors of this handbook are among the world’s leading researchers in this domain, and the 32 contributed chapters present a thorough view of the origin, theory, and application of model checking. In particular, the editors classify the advances in this domain and the chapters of the handbook in terms of two recurrent themes that have driven much of the research agenda: the algorithmic challenge, that is, designing model-checking algorithms that scale to real-life problems; and the modeling challenge, that is, extending the formalism beyond Kripke structures and temporal logic.
The book will be valuable for researchers and graduate students engaged with the development of formal methods and verification tools.
Mục lục
Introduction to Model Checking.- Temporal Logic and Fair Discrete Systems.- Modeling for Verification.- Automata Theory and Model Checking.- Explicit-State Model Checking.- Partial-Order Reduction.- Binary Decision Diagrams.- BDD-Based Symbolic Model Checking.- Propositional SAT Solving.- SAT-Based Model Checking.- Satisfiability Modulo Theories.- Compositional Reasoning.- Abstraction and Abstraction Refinement.- Interpolation and Model Checking.- Predicate Abstraction for Program Verification.- Combining Model Checking and Data-Flow Analysis.- Model Checking Procedural Programs.- Model Checking Concurrent Programs.- Combining Model Checking and Testing.- Combining Model Checking and Deduction.- Model Checking Parameterized Systems.- Model Checking Security Protocols.- Transfer of Model Checking to Industrial Practice.- Functional Specification of Hardware via Temporal Logic.- Symbolic Trajectory Evaluation.- The mu-calculus and Model Checking.- Graph Games and Reactive Synthesis.-Model Checking Probabilistic Systems.- Model Checking Real-Time Systems.- Verification of Hybrid Systems.- Symbolic Model Checking in Non-Boolean Domains.- Process Algebra and Model Checking.
Giới thiệu về tác giả
Edmund M. Clarke was Professor Emeritus in the Dept. of Computer Science at Carnegie Mellon University, where he was formerly the FORE Systems Professor. He received his Ph.D. in Computer Science from Cornell University in 1976. With E. Allen Emerson and Joseph Sifakis he received the ACM Turing Award in 2007 for his work on the development of model checking. He cofounded the Computer Aided Verification (CAV) conference, and the journal Formal Methods in Systems Design. Among many honors, he was elected to the US National Academy of Engineering and to the American Academy of Arts and Sciences. His research interests include software and hardware verification and automatic theorem proving.
Thomas A. Henzinger is President of IST Austria (Institute of Science and Technology Austria). He holds a Ph.D. in Computer Science from Stanford University (1991). He has held assistant, associate, and full professorships in Cornell University (1992–95), the University of California, Berkeley (1996–2004), and EPFL in Lausanne, Switzerland (2004-09); he was also Director at the Max Planck Institute for Computer Science in Saarbrücken, Germany (1999). His research focuses on modern systems theory, especially models, algorithms, and tools for the design and verification of reliable software, hardware, and embedded systems. He is an ISI highly cited researcher, a member of Academia Europaea, the German Academy of Sciences (Leopoldina), and the Austrian Academy of Sciences, and a Fellow of the AAAS, ACM, and IEEE. He has received the Milner Award of the Royal Society, the Wittgenstein Award of the Austrian Science Fund, and an ERC Advanced Investigator Grant.
Helmut Veith was a professor in the Faculty of Informatics of Technische Universität Wien, and an adjunct professor at Carnegie Mellon University. He received his Ph D (sub auspiciis praesidentis) in Computer Science from TU Wien. He previously held professor positions at TU München and TU Darmstadt. In his research, he applied formal and logical methods to problems in software technology and engineering, focusing on model checking, software verification and testing, embedded software, and computer security. Prof. Veith passed away in 2016 during the final editing on the Handbook.
Roderick Bloem received his Ph D from the University of Colorado at Boulder (2001) for work on formal verification using linear temporal logic. He moved to Technische Universität Graz in 2002, where he has been a full professor since 2008. His research interests are in formal methods for the design and verification of digital systems, including hardware, software, and combinations such as embedded systems. He studies applications of game theory to the automatic synthesis of systems from their specifications, connections between temporal logics and omega-automata, model checking, and automatic fault localization and repair.
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