Over the past decade, system-on-chip (So C) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a So C design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern So C designs. As application complexity strains the communication backbone of So C designs, academic and industrial R&D efforts and dollars are increasingly focused on communication architecture design. On-Chip Communication Architecures is a comprehensive reference on concepts, research and trends in on-chip communication architecture design. It will provide readers with a comprehensive survey, not available elsewhere, of all current standards for on-chip communication architectures. – A definitive guide to on-chip communication architectures, explaining key concepts, surveying research efforts and predicting future trends- Detailed analysis of all popular standards for on-chip communication architectures- Comprehensive survey of all research on communication architectures, covering a wide range of topics relevant to this area, spanning the past several years, and up to date with the most current research efforts- Future trends that with have a significant impact on research and design of communication architectures over the next several years