Deepraj Soni & Kanad Basu 
Hardware Architectures for Post-Quantum Digital Signature Schemes [PDF ebook] 

Destek

This book explores C-based design, implementation, and analysis of post-quantum cryptography (PQC) algorithms for signature generation and verification.  The authors investigate NIST round 2 PQC algorithms for signature generation and signature verification from a hardware implementation perspective, especially focusing on C-based design, power-performance-area-security (PPAS) trade-offs and design flows targeting FPGAs and ASICs.


  • Describes a comprehensive set of synthesizable c code base as well as the hardware implementations for the different types of PQC algorithms including lattice-based, code-based, and multivariate-based;

  • Demonstrates the hardware (FPGA and ASIC) and hardware-software optimizations and trade-offs of the NIST round 2 signature-based PQC algorithms;

  • Enables designers to build hardware implementations that are resilient to a variety of side-channels.

€106.99
Ödeme metodları

İçerik tablosu

Introduction.- q TESLA.- CRYSTALS –Dilithium.- MQDSS.- SPHINCS.- Luov.- Falcon.- Picnic.- Ge MSS.- Power, Performance, Area, and Security (PPAS) Comparison of the PQC Algorithms.- Conclusions.

Yazar hakkında

Deepraj Soni is a Ph.D. student at NYU Tandon School of Engineering. Deepraj works on hardware implementation, evaluation and security of post quantum cryptographic algorithms. He received his M.Tech from the Department of Electrical Engineering, Indian Institute of Technology Bombay (IIT B). His thesis focused on developing a framework for hardware software co simulator and neural network implementation on an FPGA. After graduation, Deepraj worked as a design engineer in the semiconductor division of Samsung and San Disk. At Samsung, he was responsible for the design and architecture of the image processing IPs such as region segmentation and Embedded CODEC. He was also responsible for communication IPs such as FFT/IFFT, Time & Frequency Deinterleaving and Demapper for canceling the noise. At San Disk, Deepraj helped in the development of System On Chip (So C) level design for the memory controller.


Bu e-kitabı satın alın ve 1 tane daha ÜCRETSİZ kazanın!
Dil İngilizce ● Biçim PDF ● Sayfalar 170 ● ISBN 9783030576820 ● Dosya boyutu 5.2 MB ● Yayımcı Springer International Publishing ● Kent Cham ● Ülke CH ● Yayınlanan 2020 ● İndirilebilir 24 aylar ● Döviz EUR ● Kimlik 7653779 ● Kopya koruma Sosyal DRM

Aynı yazardan daha fazla e-kitap / Editör

18.646 Bu kategorideki e-kitaplar