This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the Fin FET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.
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格式 PDF ● 网页 154 ● ISBN 9781351751049 ● 出版者 CRC Press ● 发布时间 2017 ● 下载 3 时 ● 货币 EUR ● ID 5329239 ● 复制保护 Adobe DRM
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