This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the Fin FET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.
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Format EPUB ● Seiten 154 ● ISBN 9781351751032 ● Verlag CRC Press ● Erscheinungsjahr 2017 ● herunterladbar 3 mal ● Währung EUR ● ID 8116198 ● Kopierschutz Adobe DRM
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