This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the Fin FET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.
Compre este e-book e ganhe mais 1 GRÁTIS!
Formato EPUB ● Páginas 154 ● ISBN 9781351751032 ● Editora CRC Press ● Publicado 2017 ● Carregável 3 vezes ● Moeda EUR ● ID 8116198 ● Proteção contra cópia Adobe DRM
Requer um leitor de ebook capaz de DRM