This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the Fin FET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.
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Formato EPUB ● Páginas 154 ● ISBN 9781351751032 ● Editorial CRC Press ● Publicado 2017 ● Descargable 3 veces ● Divisa EUR ● ID 8116198 ● Protección de copia Adobe DRM
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